DIGITAL SYSTEM DESIGN PROJECT

• Simple RISC Processor Instruction Set Architecture v3.2
• Simple RISC Processor Pipeline v1.0
• Simple RISC Processor Pipeline - Parallel Execution Units

1. Simple RISC Processor golden model
2. Step by step pipeline implementation
3. Step by step parallel implementation

• Verilog Tutorial from ASIC World
• Verilog Tutorial from Chip Verify
• Verilog reference guide

IDE for FPGA based design (HDL and system design, simulation, synthesis, firmware etc):

• AMD/Xilinx Vivado