ADDITIONAL ASSUMPTIONS

A. Assume a simple execution unit, with one clock latency, that treats floating point arithmetic instructions
as integer arithmetic instructions.
The main goal now is to set up a functional pipeline, not to design the execution block.

B. The data memory is synchronous with 2 clk read latency.
It registers the address in the first clock cycle and outputs read data during the second clock cycle.

C. The program and data memories are not part of the top processor module. They are modeled as symple as possible.
The program memory is a vector whose element is combinationally selected by the program counter.
The data memory is clocked.

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PIPELINE STEP BY STEP DESIGN

1.
Design each pipeline stage in a separate module, assuming no data and control dependencies.
Test the pipeline flow for a sequence of independent instructions (only arithmetic&logic instructions, nops and halt).

2.
Provide a separate module for data dependency control.
Assume only arithmetic&logic instructions, nops and halt in the sequence of instructions.
Test the pipeline for a couple of data dependent instructions.
Start with a program that has only 1 data dependency.
Then add more data dependencies into your program. 
Progress from simple to complex programs.

3
Design the sublock/part of the execution stage that deals with jump instructions.
Modify the fetch stage so that its PC can be updated from the execution stage if a jump is required.
Also some pipeline registers must have additional logic to annull (change to nop) the instructions from the wrong branch in case of a taken jump.
Test the pipeline with a couple of instructions that has one unconditional jump between them.
Then test for a couple of instructions that has one conditional jump between them.
Repeat the test for opposite condition values.

4.
Add the logic that deals with STORE and LOAD instructions.
Change the data forward logic from step 2, such that to treat differently the case when a LOAD in the execution stage is immediately
followed by an instruction whose source is the same as the destination of the LOAD instruction.
Test with a sequence without jumps and with only one data dependency pair of instructions where the first instruction of the pair is LOAD.
Then test with a sequence with more data dependencies, some of them with LOAD instructions.
Finally test the pipeline with a sequence with data dependencies, some of them with LOADs, and with jumps.
As an example, write a program to multiply numbers read from data memory and the result stored also in the memory.