The first starting idea: optimizing a multi-processor means to share the expensive, not frequently used resources.
The second starting idea: virtual vs. actual in a multi-processor structure must be based on the cheap, most frequently
In the late '70s the most costly resources in a general purpose
microprogrammed processor were: the ALU and the microprogram memory. In
the same time the possibility to provide a big number of registers was
increased by the possibility to use cheap MSI TTL chips containing dual
port static RAMs.
In order to use efficiently the costly resources and to take the
advantages of the cheep resources I proposed, in my PhD thesis
[Stefan '79], a processor architecture called
Virtual Multi-Processor, with two new features:
The number of the actual threads executed in parallel was limited to the number of
pipeline stage of the processor (in the actual machine a two level
pipeline processor was implemented).
- pipelined multi-threaded execution allowing to share the costly
resources to support many computations (threads)
- multiple banks of registers allowing one-cycle context
The number of virtual machine was limited to the number of memory banks
used to implement the register file of the processor (4 in the actual
The first working prototype was built in 1978 in the
Functional Electronics Laboratory (Polytechnic Institute of
Bucharest) as the CPU of the graphic machine DIAGRAM.
The Virtual Multi-Processor architecture was used to design and
implement the DIALISP system, a LISP Machine [Stefan '84].
For a better understanding of this kind of architecture see [Stefan
'96] or click on:
to see a late implementation of the same idea in the context of the current technologies.
[Stefan '79] G. Stefan: LSI Circuits for Processors, Ph. D. Thesis in Polytechnical Institute of
Bucharest, 1979. (in Romanian)
[Stefan '84] G. Stefan, Aurel Paun, Andy Birnbaum, Virgil Bistriceanu:
"DIALISP - A LISP Machine",
The 1984 ACM Symposium on LISP and Functional Programming, 1984. p. 123-128.
[Stefan '96] G. Stefan: "A Multi-thread Approach in order to Avoid Pipeline Penalties", in Proceedings of 12th International Conference on Control Systems and Computer Science,
Vol. II, May 26-29, 1999, Bucharest, Romania. p. 157-162.